DeviceNet Mini-style Connectors

文件：292.98 Kbytes 页数：5 Pages

DDK

REMOVE PHANTOM POWER

文件：274.77 Kbytes 页数：5 Pages

CHAMP

虹冠电子

REMOVE PHANTOM POWER

文件：274.77 Kbytes 页数：5 Pages

CHAMP

虹冠电子

丝印：CM030B；Package：TSSOP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CM030B；Package：TSSOP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CM030B；Package：TSSOP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CM031B；Package：TSSOP；CMOS 64-Stage Static Shift Register

Features; ® Fully static operation: DC to 12 MHz typ. @ Vpp—Vsg =15v = Standard TTL drive capability on Q output = Recirculation capability = Three cascading modes: Direct clocking for high-speed operation Delayed clocking for reduced clock drive requirements Additional 1/2 stage for slow

文件：662.22 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CM031B；Package：TSSOP；CMOS 64-Stage Static Shift Register

Features; ® Fully static operation: DC to 12 MHz typ. @ Vpp—Vsg =15v = Standard TTL drive capability on Q output = Recirculation capability = Three cascading modes: Direct clocking for high-speed operation Delayed clocking for reduced clock drive requirements Additional 1/2 stage for slow

文件：662.22 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CM031B；Package：TSSOP；CMOS 64-Stage Static Shift Register

Features; ® Fully static operation: DC to 12 MHz typ. @ Vpp—Vsg =15v = Standard TTL drive capability on Q output = Recirculation capability = Three cascading modes: Direct clocking for high-speed operation Delayed clocking for reduced clock drive requirements Additional 1/2 stage for slow

文件：662.22 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CM033B；Package：TSSOP；CMOS Decade Counters/Dividers

Features: Counter and 7-segment decoding in one package Easily interfaced with 7-segment display types Fully static counter operation: DC to 6 MHz (typ.) at Vpp=10V Ideal for low-power displays Display enable output {CD4026B) “Ripple blanking” and lamp test (CD4033B) 100% tested

文件：900.87 Kbytes 页数：20 Pages

TI

德州仪器