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CLVC574AQDWRG4Q1.B中文资料德州仪器数据手册PDF规格书

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厂商型号

CLVC574AQDWRG4Q1.B

功能描述

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

丝印标识

L574AQ1

封装外壳

SOIC

文件大小

657.11 Kbytes

页面数量

16

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-11-15 13:01:00

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CLVC574AQDWRG4Q1.B规格书详情

1FEATURES

· Qualified for Automotive Applications

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Operates From 2 V to 3.6 V

· Inputs Accept Voltages to 5.5 V

· Max tpd of 7 ns at 3.3 V

· Typical VOLP (Output Ground Bounce) < 0.8 V

at VCC = 3.3 V, TA = 25°C

· Typical VOHV (Output VOH Undershoot) > 2 V at

VCC = 3.3 V, TA = 25°C

· Supports Mixed-Mode Signal Operation on All

Ports (5-V Input/Output Voltage With 3.3-V VCC)

· Ioff Supports Partial-Power-Down Mode

Operation

DESCRIPTION/ORDERING INFORMATION

The SN74LVC574A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.

This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance

loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working

registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or

low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the

bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without interface or pullup components.

OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of thIs device as a translator in

a mixed 3.3-V/5-V system environment.

供应商 型号 品牌 批号 封装 库存 备注 价格
TI
23+
TSSOP20
50000
全新原装正品现货,支持订货
询价
TI/德州仪器
25+
20-TSSOP
65248
百分百原装现货 实单必成
询价
TI
20+
TSSOP
65790
原装优势主营型号-可开原型号增税票
询价
TI/德州仪器
25+
原厂封装
10280
询价
TI(德州仪器)
24+
TSSOP20
2886
原装现货,免费供样,技术支持,原厂对接
询价
TI/德州仪器
23+
TSSOP14
3000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
询价
24+
N/A
73000
一级代理-主营优势-实惠价格-不悔选择
询价
TI/德州仪器
25+
TSSOP14
880000
明嘉莱只做原装正品现货
询价
TI
20+
TSSOP20
6000
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
TI
23+
20-TSSOP
3115
正品原装货价格低
询价