丝印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：697.46 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：697.46 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

* 5-Ω Switch Connection Between Two Ports * Rail-to-Rail Switching on Data I/O Ports * Ioff Supports Partial-Power-Down Mode Operation * Flow-Through Architecture Optimizes PCB Layout * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

文件：695.31 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：697.46 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TSSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：697.46 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TSSOP(PW)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器