CDP68HC68P1E数据手册Renesas中文资料规格书

描述 Description

CMOS Serial 8-Bit Input/Output PortThe CDP68HC68P1 is a serially addressed 8-bit Input/Output port that allows byte or individual bit control. It
consists of three registers, an output buffer and control logic. Data is shifted in and out of the device via shift register that utilizes the SPI (Serial PeripheralInterface) bus. The I/O port data flow is controlled by the Data Direction Register and data is stored in the Data Register that outputs or senses the logic levels at the buffered I/O pins. All inputs, including the serial interface are Schmitt triggered.

特性 Features

• Fully Static Operation
• Operating Voltage Range 3-6V
• Compatible with Intersil/Motorola SPI Bus
• 2 External Address Pins Tied to VDDor VSSto Allow Up to 4 Devices to Share the Same Chip Enable
• Versatile Bit-Set and Bit-Clear Capability
• Accepts Either SCK Clock Polarity - SCK Voltage Level is Latched When Chip Enable Goes Active
• All Inputs are Schmitt-Trigger
• 8-Bit I/O Port - Each Bit can be Individually Programmed as an Input or Output Via an 8-Bit Data Direction Register
• Programmable On Board Comparator
• Simultaneous Transfer of Compare Information to CPU During Read or Write - Separate Access Not Required