CDP6805E2Q中文资料Microprocessor Unit数据手册ADI规格书

描述 Description

The IA6805E2 (CMOS) Microprocessor Unit (MPU) is a low cost, low power MPU. It features a CPU, on-chip RAM, parallel I/O compatibility with pins programmable as input or  output. The following paragraphs will further describe this system block diagram and design in more detail.FEATURES
·  Form, Fit, and Function Compatible with the Harris© CDP6805E2CE and Motorola© MC146805E2
·  Internal 8 -bit Timer with 7-Bit Programmable Prescaler
·  On-chip Clock
·  Memory Mapped I/O
·  Versatile Interrupt Handling
·  True Bit Manipulation
·  Bit Test and BranchInstruction
·  Vectored Interrupts
·  Power-saving STOP and WAIT Modes
·  Fully Static Operation
·  112 Bytes of RAM

特性 Features

·  Form, Fit, and Function Compatible with the Harris© CDP6805E2CE and Motorola© MC146805E2
·  Internal 8 -bit Timer with 7-Bit Programmable Prescaler
·  On-chip Clock
·  Memory Mapped I/O
·  Versatile Interrupt Handling
·  True Bit Manipulation
·  Bit Test and BranchInstruction
·  Vectored Interrupts
·  Power-saving STOP and WAIT Modes
·  Fully Static Operation
·  112 Bytes of RAM