1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 125 MHz to 410 MHz · Application Frequency: 160 MHz to 410 MHz · Low Current Consumption:

文件：604.7 Kbytes 页数：18 Pages

TI

德州仪器

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：615.54 Kbytes 页数：16 Pages

TI

德州仪器

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：579.2 Kbytes 页数：16 Pages

TI

德州仪器

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：615.54 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CDCUA877；Package：NFBGA；1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 125 MHz to 410 MHz · Application Frequency: 160 MHz to 410 MHz · Low Current Consumption:

文件：604.7 Kbytes 页数：18 Pages

TI

德州仪器

丝印：CDCUA877；Package：NFBGA；1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 125 MHz to 410 MHz · Application Frequency: 160 MHz to 410 MHz · Low Current Consumption:

文件：604.7 Kbytes 页数：18 Pages

TI

德州仪器

丝印：CDCUA877；Package：NFBGA；1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 125 MHz to 410 MHz · Application Frequency: 160 MHz to 410 MHz · Low Current Consumption:

文件：604.7 Kbytes 页数：18 Pages

TI

德州仪器

丝印：CDCUA877；Package：NFBGA；1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 125 MHz to 410 MHz · Application Frequency: 160 MHz to 410 MHz · Low Current Consumption:

文件：604.7 Kbytes 页数：18 Pages

TI

德州仪器

适用于 DDR2 SDRAM 应用的 1.8V/1.9V 锁相环路时钟驱动器

The CDCUA877 is a high-performance, low-jitter, low-skew, zero-delay buffer that distributes a differential clock input pair (CK, CK) to ten differential pairs of clock outputs (Yn, Yn) and to one differential pair of feedback clock outputs (FBOUT, FBOUT). The clock outputs are controlled by the inp • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications\n• Operating Frequency: 125 MHz to 410 MHz\n• Low Current Consumption: FBIN) are Used to Synchronize the Outputs to the Input Clockst\n• Fail-Safe Inputs\n MicroStar Junior is a trademark of Texas Instruments.;

TI

德州仪器

1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 125 MHz to 410 MHz · Application Frequency: 160 MHz to 410 MHz · Low Current Consumption:

文件：604.7 Kbytes 页数：18 Pages

TI

德州仪器