1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes 页数：24 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes 页数：27 Pages

TI

德州仪器

1:3 LVPECL 时钟缓冲器 + LVCMOS 输出 + 可编程分频器

The CDCM1804 clock driver distributes one pair of differential clock inputs to three pairs of LVPECL differential clock outputs Y[2:0] and Y[2:0], with minimum skew for clock distribution. The CDCM1804 is specifically designed for driving 50- transmission lines. Additionally, the CDCM1804 offers a s • Distributes One Differential Clock Input to Three LVPECL Differential Clock Outputs and One LVCMOS Single-Ended Output\n• Programmable Output Divider for Two LVPECL Outputs and LVCMOS Output\n• Low-Output Skew 15 ps (Typical) for Clock-Distribution Applications for LVPECL Outputs; 1.6-ns Output Sk;

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes 页数：27 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes 页数：27 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes 页数：24 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes 页数：24 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes 页数：27 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：589.11 Kbytes 页数：24 Pages

TI

德州仪器

1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER

文件：623.31 Kbytes 页数：27 Pages

TI

德州仪器