CDCLVD1208

低抖动 2 路输入可选 1:8 通用至 LVDS 缓冲器; • 2:8 Differential Buffer\n• Low Additive Jitter: AC_REF, Available for Capacitive Coupled Inputs\n• Industrial Temperature Range: –40°C to 85°C\n• Packaged in 5-mm × 5-mm, 28-Pin VQFN (RHD)\n• ESD Protection Exceeds 3-kV HBM, 1-kV CDM\n• APPLICATIONS \n• Telecommunications and Networking\n• Medical Imaging\n• Test and Measurement Equipment\n• Wireless Communications\n• General-Purpose Clocking\n \n All other trademarks are the property of their respective owners;

The CDCLVD1208 clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The CDCLVD1208 can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, or LVCMOS.\n\nThe CDCLVD1208 is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage, VAC_REF, must be applied to the unused negative input pin.\n\nThe IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static). The part supports a fail-safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.\n\nThe device operates in 2.5-V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD1208 is packaged in small, 28-pin, 5-mm × 5-mm VQFN package.

CDCLVD1208

2:8 Low Additive Jitter LVDS Buffer

CDCLVD1208RHDR

2:8 Low Additive Jitter LVDS Buffer

CDCLVD1208RHDT

2:8 Low Additive Jitter LVDS Buffer

CDCLVD1208RHDR

Package：28-VFQFN 裸露焊盘；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 2:8 800MHZ 28VQFN

CDCLVD1208RHDT

Package：28-VFQFN 裸露焊盘；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 2:8 800MHZ 28VQFN