| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI | ||
丝印：CDC906；Package：TSSOP；PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 1FEATURES 2• High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider • User Programmable PLL Frequencies • Easy In-Circuit Programming via SMBus Data Interface • Wide PLL Divider Ratio Allows 0-PPM Output Clock Error • Generates Precise Video (27 MHz or 54 MHz) and Audio Sy 文件：1.22849 Mbytes 页数：46 Pages | TI 德州仪器 | TI |
详细参数
- 型号：
CDC906
- 功能描述：
时钟合成器/抖动清除器 Custom Prog 3-PLL Clock
- RoHS：
否
- 制造商：
Skyworks Solutions, Inc.
- 最大输入频率：
6.1 GHz
- 电源电压-最大：
3.3 V
- 电源电压-最小：
2.7 V
- 封装/箱体：
TSSOP-28
- 封装：
Reel
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
TSSOP20 |
956 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
询价 | ||
TI |
24+ |
108 |
20-TSSOP |
询价 | |||
TexasInstruments |
18+ |
IC2:6PLLSYNTH/MULT/DIV20 |
6580 |
公司原装现货/欢迎来电咨询! |
询价 | ||
TI |
20+ |
TSSOP |
53650 |
TI原装主营-可开原型号增税票 |
询价 | ||
Texas Instruments |
24+ |
20-TSSOP |
56200 |
一级代理/放心采购 |
询价 | ||
TI/德州仪器 |
2447 |
TSSOP |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 | ||
TI |
25+ |
SSOP-20 |
140 |
就找我吧!--邀您体验愉快问购元件! |
询价 | ||
22+ |
NA |
3450 |
加我QQ或微信咨询更多详细信息, |
询价 | |||
TI |
22+ |
20TSSOP |
9000 |
原厂渠道,现货配单 |
询价 | ||
TI |
23+ |
20TSSOP |
9000 |
原装正品，支持实单 |
询价 |
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