丝印：CDC318A；Package：SSOP；1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器

1Line to 10Line Clock Driver

文件：500.93 Kbytes 页数：14 Pages

TI

德州仪器

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器