CD74HCT574QM96EP.A中文资料德州仪器数据手册PDF规格书

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

Extended Temperature Performance of

−40°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Enhanced Product Change Notification

Qualification Pedigree†

Buffered Inputs

Common 3-State Output-Enable Control

3-State Outputs

Bus-Line Driving Capability

Typical Propagation Delay (Clock to Q):

15 ns at VCC = 5 V, CL = 15 pF, TA = 25
C

Fanout (Over Temperature Range)

− Standard Outputs . . . 10 LSTTL Loads

− Bus Driver Outputs . . . 15 LSTTL Loads

Balanced Propagation Delay and Transition

Times

Significant Power Reduction Compared to

LSTTL Logic ICs

VCC Voltage = 4.5 V to 5.5 V

Direct LSTTL Input Logic Compatibility,

VIL = 0.8 V (Max), VIH = 2 V (Min)

CMOS Input Compatibility, Il
1
A at VOL,

VOH