丝印：CD74HCT563E；Package：PDIP；High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

Features • Common Latch-Enable Control • Common Three-State Output Enable Control • Buffered Inputs • Three-State Outputs • Bus Line Driving Capacity • Typical Propagation Delay = 13ns at VCC = 5V, CL = 15pF, TA = 25oC (Data to Output) • Fanout (Over Temperature Range) - Standard Outputs

文件：610.89 Kbytes 页数：17 Pages

TI

德州仪器

High Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：50.92 Kbytes 页数：9 Pages

TI

德州仪器

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：286.35 Kbytes 页数：14 Pages

TI

德州仪器

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：282.94 Kbytes 页数：14 Pages

TI

德州仪器