High Speed CMOS Logic Triple 3-Input AND Gate

文件：33.84 Kbytes 页数：6 Pages

TI

德州仪器

High-Speed CMOS Logic Triple 3-Input AND Gate

文件：260.86 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD74HCT112E；Package：PDIP；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger

1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output

文件：1.3793 Mbytes 页数：29 Pages

TI

德州仪器

丝印：CD74HCT11E；Package：PDIP；CDx4HCT11 Triple 3-Input AND Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

文件：1.13275 Mbytes 页数：27 Pages

TI

德州仪器

丝印：CD74HCT11E；Package：PDIP；CDx4HCT11 Triple 3-Input AND Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

文件：1.13275 Mbytes 页数：27 Pages

TI

德州仪器

丝印：CD74HCT11E；Package：PDIP；CDx4HCT11 Triple 3-Input AND Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

文件：1.13275 Mbytes 页数：27 Pages

TI

德州仪器

丝印：CD74HCT11E；Package：PDIP；CDx4HCT11 Triple 3-Input AND Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

文件：1.13275 Mbytes 页数：27 Pages

TI

德州仪器

具有 TTL 兼容型 CMOS 输入的 3 通道、3 输入、4.5V 至 5.5V 与门

This device contains three independent 3-input AND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. • LSTTL input logic compatible \n• CMOS input logic compatible \n• Buffered inputs\n• Wide operating temperature range: -55°C to +125°C\n• Significant power reduction compared to LSTTL logic ICs;

TI

德州仪器

CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger

1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output

文件：1.3793 Mbytes 页数：29 Pages

TI

德州仪器

丝印：HCT11M；Package：SOIC；CDx4HCT11 Triple 3-Input AND Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

文件：1.13275 Mbytes 页数：27 Pages

TI

德州仪器