CD54HC4046A

带 VCO 的高速 CMOS 逻辑锁相环; • Operating Frequency Range \n - Up to 18MHz (Typ) at VCC = 5V\n• Minimum Center Frequency of 12MHz at VCC = 4.5V\n• Choice of Three Phase Comparators \n - EXCLUSIVE-OR\n• Edge-Triggered JK Flip-Flop\n• Edge-Triggered RS Flip-Flop\n• Excellent VCO Frequency Linearity\n• VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption\n• Minimal Frequency Drift\n• Operating Power Supply Voltage Range \n - VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V\n• Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V\n• Fanout (Over Temperature Range) \n - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads\n• Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads\n• Wide Operating Temperature Range . . . -55°C to 125°C\n• Balanced Propagation Delay and Transition Times\n• Significant Power Reduction Compared to LSTTL Logic ICs\n• HC Types \n - 2V to 6V Operation\n• High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V\n• HCT Types \n - 4.5V to 5.5V Operation\n• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)\n• CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH\n• Applications \n - FM Modulation and Demodulation\n• Frequency Synthesis and Multiplication\n• Frequency Discrimination\n• Tone Decoding\n• Data Synchronization and Conditioning\n• Voltage-to-Frequency Conversion\n• Motor-Speed Control;

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the \"4000B\" series. They are specified in compliance with JEDEC standard number 7.\n The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.\n The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.\n \n

CD54HC4046A

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046A

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046A

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046A_07

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046A_08

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046AF

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046AF

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046AF

High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046AF3A

High-Speed CMOS Logic Phase-Locked Loop with VCO