CD54HC4024中文资料高速 CMOS 逻辑 7 级二进制纹波计数器数据手册TI规格书

描述 Description

The ’HC4024 and ’HCT4024 are 7-stage ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of the stage advances one count on the negative transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

特性 Features

• Fully Static Operation
• Common Reset
• Fanout (Over Temperature Range)
• Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55°C to 125°C
• Significant Power Reduction Compared to LSTTL Logic ICs
• 2V to 6V Operation
• HCT Types
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il 1µA at VOL, VOH