Octal Transparent Latch Three-State, Non-Inverting

Description The CD54AC573/3A and CD54ACT573/3A are octal transparent three-state latches that utilize the Harris Advanced CMOS Logic technology. The outputs are transparent to the inputs when the Latch Enable (LE) is HIGH. When the Latch Enable (LE) goes LOW, the data is latched. The Output Enabl

文件：9.74 Kbytes 页数：1 Pages

INTERSIL

Octal TRansparent Latch, 3-State

Family Features: Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015 SCR-Latchup-resistant CMOS process and circuit design Speed of bipolar FAST*/AS]S with significantly reduced power consumption Balanced propagation delays. AC types feature 1.5-V to 5.5-V operation and balanced noise

文件：828.77 Kbytes 页数：18 Pages

TI

德州仪器

OCTAL TRANSPARENT LATCH, 3-STATE

文件：240.19 Kbytes 页数：8 Pages

TI

德州仪器

Octal transparent Latch, 3-state

文件：1.26782 Mbytes 页数：17 Pages

TI

德州仪器

具有三态输出的同向八路透明锁存器

The RCA-CD54/74AC563 and CD54/74AC573 and the CD54/74ACT563 and CD54/74ACT573 octal transparent 3-state latches use the RCA ADVANCED CMOS technology. The outputs are transparent to the inputs when the Latch Enable (LE\\) is HIGH. When the Latch Enable (LE\\) goes LOW, the data is latched. The Output • Buffered inputs\n• Typical propagation delay: 4.3 ns @ VCC = 5 V, TA = 25°C, CL = 50 pf\n• Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015\n• SCR-Latchup-resistant CMOS process and circuit design\n• Speed of bipolar FAST*/AS/D with significantly reduced power consumption\n• Balanced propaga;

TI

德州仪器

Octal Transparent Latch Three-State, Non-Inverting

Description The CD54AC573/3A and CD54ACT573/3A are octal transparent three-state latches that utilize the Harris Advanced CMOS Logic technology. The outputs are transparent to the inputs when the Latch Enable (LE) is HIGH. When the Latch Enable (LE) goes LOW, the data is latched. The Output Enabl

文件：9.74 Kbytes 页数：1 Pages

INTERSIL

丝印：CD54AC573F3A；Package：CDIP；Octal TRansparent Latch, 3-State

Family Features: Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015 SCR-Latchup-resistant CMOS process and circuit design Speed of bipolar FAST*/AS]S with significantly reduced power consumption Balanced propagation delays. AC types feature 1.5-V to 5.5-V operation and balanced noise

文件：828.77 Kbytes 页数：18 Pages

TI

德州仪器

丝印：CD54AC573F3A；Package：CDIP；Octal TRansparent Latch, 3-State

Family Features: Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015 SCR-Latchup-resistant CMOS process and circuit design Speed of bipolar FAST*/AS]S with significantly reduced power consumption Balanced propagation delays. AC types feature 1.5-V to 5.5-V operation and balanced noise

文件：828.77 Kbytes 页数：18 Pages

TI

德州仪器

Octor Transparent Latch, 3-state

文件：979.77 Kbytes 页数：16 Pages

TI

德州仪器

Octal transparent Latch, 3-state

文件：1.26782 Mbytes 页数：17 Pages

TI

德州仪器