6.4 VOLT ZENER VOLTAGE 5

• 1N4565A THRU 1N4584A AVAILABLE IN JANHC AND JANKC PER MIL-PRF-19500/452 • ALL JUNCTIONS COMPLETELY PROTECTED WITH SILICON DIOXIDE • 6.4 VOLT ZENER VOLTAGE ± 5 • ELECTRICALLY EQUIVALENT TO 1N4565 THRU 1N4584A • COMPATIBLE WITH ALL WIRE BONDING AND DIE ATTACH TECHNIQUES, WITH THE EXCEPTION OF

文件：263.84 Kbytes 页数：2 Pages

Microsemi

美高森美

6.4 VOLT ZENER VOLTAGE 5

• 1N4565A THRU 1N4584A AVAILABLE IN JANHC AND JANKC PER MIL-PRF-19500/452 • ALL JUNCTIONS COMPLETELY PROTECTED WITH SILICON DIOXIDE • 6.4 VOLT ZENER VOLTAGE + 5 • ELECTRICALLY EQUIVALENT TO 1N4565 THRU 1N4584A • COMPATIBLE WITH ALL WIRE BONDING AND DIE ATTACH TECHNIQUES, WITH THE EXCEPTION OF

文件：253.15 Kbytes 页数：2 Pages

CDI-DIODE

丝印：CD4572UBE；Package：PDIP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4572UBE；Package：PDIP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4572UBE；Package：PDIP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4572UBM；Package：SOIC；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4572UBM；Package：SOIC；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4572UB；Package：SOP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4572UB；Package：SOP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI

德州仪器

Package：模具；包装：卷带（TR） 类别：分立半导体产品 二极管 - 齐纳 - 单 描述：DIODE ZENER TEMP COMPENSATED

Microchip

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