丝印：CD4522BE；Package：PDIP；CMOS Programmable BCD Divide-by-“N” Counter

Features: ® Internally synchronous for high inter- nal and external speeds. ® Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ® 100% tested for quiescent current at 20-V. B® 5-V, 10-V, and 15-V parametric ratings. ® Standar

文件：634.52 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CD4522BE；Package：PDIP；CMOS Programmable BCD Divide-by-“N” Counter

Features: ® Internally synchronous for high inter- nal and external speeds. ® Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ® 100% tested for quiescent current at 20-V. B® 5-V, 10-V, and 15-V parametric ratings. ® Standar

文件：634.52 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CD4522BE；Package：PDIP；CMOS Programmable BCD Divide-by-“N” Counter

Features: ® Internally synchronous for high inter- nal and external speeds. ® Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ® 100% tested for quiescent current at 20-V. B® 5-V, 10-V, and 15-V parametric ratings. ® Standar

文件：634.52 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CD4522BE；Package：PDIP；CMOS Programmable BCD Divide-by-“N” Counter

Features: ® Internally synchronous for high inter- nal and external speeds. ® Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ® 100% tested for quiescent current at 20-V. B® 5-V, 10-V, and 15-V parametric ratings. ® Standar

文件：634.52 Kbytes 页数：16 Pages

TI

德州仪器

CMOS Programmable BCD Divide-by-N Counter

文件：527.2 Kbytes 页数：15 Pages

TI

德州仪器

CMOS Programmable BCD Divide-by-N Counter

文件：527.2 Kbytes 页数：15 Pages

TI

德州仪器