丝印：CD4094BF；Package：CDIP；CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

CMOS 8-Stage Shift-and-Store Bus Register

文件：1.11992 Mbytes 页数：14 Pages

TI

德州仪器

CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

CMOS 8-Stage Shift-and-Store Bus Register

Description CD4094BMS is a 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock trans

文件：87.8 Kbytes 页数：11 Pages

Intersil