CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

CMOS 8-STAGE SHIFT-AND-STORE BUS REGISTER

文件：281.11 Kbytes 页数：5 Pages

TI

德州仪器

CMOS 8-STAGE SHIFT-AND-STORE BUS REGISTER

文件：1.11921 Mbytes 页数：14 Pages

TI

德州仪器

CMOS 8-Stage Shift-and-Store Bus Register

文件：1.11992 Mbytes 页数：14 Pages

TI

德州仪器

CMOS 8-STAGE SHIFT-AND-STORE BUS REGISTER

文件：1.11921 Mbytes 页数：14 Pages

TI

德州仪器

丝印：CD4094B；Package：SOP；CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4094B；Package：SOP；CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

8-Bit Shift Register/Latch with 3-STATE Outputs

General Description The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of the last stage (QS) can be used to cascade several devices. Data on the QSoutput is transfer

文件：68.55 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

8-Bit Shift Register/Latch with 3-STATE Outputs

General Description The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of the last stage (QS) can be used to cascade several devices. Data on the QSoutput is transfer

文件：68.55 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

8-Bit Shift Register/Latch with 3-STATE Outputs

General Description The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of the last stage (QS) can be used to cascade several devices. Data on the QSoutput is transfer

文件：68.55 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体