CD4093BMS数据手册Renesas中文资料规格书

描述 Description

CD4093BMS consists of four Schmitt trigger circuits. Each circuit functions as a two input NAND gate with Schmitt trigger action on both inputs. The gate switches at different points for positive and negative going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH) (see Figure 1).
The CD4093BMS is supplied in these 14 lead outline packages:
  Braze Seal DIP H4H
  Frit Seal DIP H1B
  Ceramic Flatpack H3W

特性 Features

• High Voltage Types (20V Rating)
• Schmitt Trigger Action on Each Input With No External Components
• Hysteresis Voltage Typically 0.9V at VDD = 5V and 2.3V at VDD = 10V
• Noise Immunity Greater than 50%
• No Limit on Input Rise and Fall Times
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”Applications
• Wave and Pulse Shapers
• High Noise Environment Systems
• Monostable Multivibrators
• Astable Multivibrators
• NAND Logic

应用 Application

• Wave and Pulse Shapers
• High Noise Environment Systems
• Monostable Multivibrators
• Astable Multivibrators
• NAND Logic