丝印：CD4085BF；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF3A；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF3A；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF3A；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4085BF3A；Package：CDIP；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

文件：938.91 Kbytes 页数：20 Pages

TI

德州仪器

CMOS DUAL 2-WIDE 2-INPUT AND-OR-INVERT GATE

文件：527 Kbytes 页数：11 Pages

TI

德州仪器

Cmos Dual 2-Wide 2-Input AND-OR-INVERT Gate

文件：892.47 Kbytes 页数：15 Pages

TI

德州仪器