军用 4 通道、2 输入、3V 至 18V 或门

CD4071B, CD4072B and CD4075B OR gates provide the system designer with direct implementation of the positive-logicOR function and supplement the existing family of CMOS gates.\n\n The CD4071B, CD4072B, and CD4075B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix),14-l • Medium-Speed Operation - tPLH, tPHL = 60 ns (typ.) at VDD = 10 V\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n• Noise margin (full package-temperature range):      1 V at VDD = 5 V      2 V at VDD = 10 V   2.5 V at VDD = 15 V\n• Meets all ;

TI

德州仪器

CMOS OR Gates

文件：1.63591 Mbytes 页数：29 Pages

TI

德州仪器

Quad 2-Input OR, AND Buffered B Series Gate

文件：182.47 Kbytes 页数：8 Pages

NSC

国半

Quad 2-Input OR, AND Buffered B Series Gate

文件：182.47 Kbytes 页数：8 Pages

NSC

国半

CMOS OR Gate

Description CD4071BMS, CD4072BMS and CD4075BMS OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates. The CD4071BMS, CD4072BMS and CD4075BMS are supplied in these 14 lead outline packages: Featu

文件：114.68 Kbytes 页数：10 Pages

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