CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBE；Package：PDIP；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBE；Package：PDIP；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBF；Package：CDIP；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBF；Package：CDIP；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBF3A；Package：CDIP；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBF3A；Package：CDIP；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBM；Package：SOIC；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBM；Package：SOIC；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD4041UBM；Package：SOIC；CMOS Quad True/Complement Buffer

Features: Balanced sink and source current; approximately 4 times standard “B drive Equalized delay to true and complement outputs 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C 5.V, 10-V

文件：919.56 Kbytes 页数：19 Pages

TI

德州仪器