64-Stage Static Shift Register

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NSC

国半

CMOS 64-Stage Static Shift Register

Description The CD4031BMS is a static shift register that contains 64 D-type, master-slave flip-flop stages and one stage which is a D-type master flip-flop only (referred to as a 1/2 stage). Features • High Voltage Type (20V Rating) • Fully Static Operation: DC to 12MHz (typ.) at VDD - VSS =

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INTERSIL

CMOS 64-Stage Static Shift Register

Renesas

瑞萨

CMOS 64-STAGE Static shfit register

文件：823.52 Kbytes 页数：14 Pages

TI

德州仪器

CMOS 64-Stage Static Shift Register

Features; ® Fully static operation: DC to 12 MHz typ. @ Vpp—Vsg =15v = Standard TTL drive capability on Q output = Recirculation capability = Three cascading modes: Direct clocking for high-speed operation Delayed clocking for reduced clock drive requirements Additional 1/2 stage for slow

文件：662.22 Kbytes 页数：16 Pages

TI

德州仪器

CMOS 64-STAGE Static shfit register

文件：823.52 Kbytes 页数：14 Pages

TI

德州仪器