丝印：CD4025BM；Package：SOIC；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

文件：1.02076 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4025BM；Package：SOIC；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

文件：1.02076 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4025BM；Package：SOIC；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

文件：1.02076 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4025B；Package：SOP；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

文件：1.02076 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4025B；Package：SOP；CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

文件：1.02076 Mbytes 页数：23 Pages

TI

德州仪器

3路3输入与非门

The CD4025 is a triple 3-input NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or • Wide supply voltage range from 3V to 15V\n• Fully static operation\n• 5V, 10V, and 15V parametric ratings\n• Standardized symmetrical output characteristics\n• Inputs and outputs are protected against electrostatic effects\n• Specified from -40℃ to +125℃\n• Packaging information: DIP14/SOP14/TSSOP;

I-CORE

中微爱芯

CMOS Quad 2-Line-to-1-Line Data Selector/Multi plexer

Features: | ® 3-state outputs | ® Standardized, symmetrical output characteristics 8 100% tested for quigscent current at 0V . | 8 Maximum input current of uA at 18V ~~ | over full package-temperature range; | 100 nA at 18 V.and 25°C | Noise margin (aver full package- | temperature

文件：457.34 Kbytes 页数：10 Pages

TI

德州仪器

CMOS Quad 2-Line-to-1-Line Data Selector/Multi plexer

Features: | ® 3-state outputs | ® Standardized, symmetrical output characteristics 8 100% tested for quigscent current at 0V . | 8 Maximum input current of uA at 18V ~~ | over full package-temperature range; | 100 nA at 18 V.and 25°C | Noise margin (aver full package- | temperature

文件：457.34 Kbytes 页数：10 Pages

TI

德州仪器

CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

Description CD40257BMS is a data selector/multiplexer featuring three state outputs which can interface directly with and drive data lines of bus oriented systems. The CD40257BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4T Frit Seal DIP H1E Ceramic Flatpa

文件：59.96 Kbytes 页数：8 Pages

Intersil

CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

文件：1.02076 Mbytes 页数：23 Pages

TI

德州仪器