CMOS 4-Bit Bidirectional Universal Shift Register

Features: 8 Medium-speed: CL. = 12 MHz typ) @ Vdd = 10v Fully static operation Synchronous parallel or serial operation Asynchronous master reset Standardized, symmetrical output characteristics 5V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC

文件：395.02 Kbytes 页数：10 Pages

TI

德州仪器

CMOS 4-Bit Bidirectional Universal Shift Register

Description The CD40104BMS is a universal shift register featuring parallel inputs, parallel outputs, SHIFT RIGHT and SHIFT LEFT serial inputs, and a high impedance third output state allowing the device to be used in bus organized systems. In the parallel load mode (S0 and S1 are high), dat

文件：129.88 Kbytes 页数：10 Pages

Intersil

CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

文件：925.59 Kbytes 页数：20 Pages

TI

德州仪器

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

文件：59.39 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

文件：59.39 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

文件：59.39 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

文件：59.39 Kbytes 页数：6 Pages

Fairchild

仙童半导体

CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

文件：925.59 Kbytes 页数：20 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

Description CD4019BMS types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input OR gate. Selection is accomplished by control bits Ka and Kb. In addition to selection of either channel A or channel B information, the control bits ca

文件：112.35 Kbytes 页数：9 Pages

Intersil

丝印：CM019B；Package：TSSOP；CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

文件：925.59 Kbytes 页数：20 Pages

TI

德州仪器