Dual D Flip-Flop

文件：141.41 Kbytes 页数：6 Pages

NSC

国半

Dual D Flip-Flop

文件：141.41 Kbytes 页数：6 Pages

NSC

国半

CMOS Dual ‘D’-Type Flip-Flop

Description CD4013BMS consists of two identical, independent data type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output to the data input, for counter and tog

文件：74.65 Kbytes 页数：9 Pages

INTERSIL

CMOS Dual ‘D’-Type Flip-Flop

Features • High-Voltage Type (20V Rating) • Set-Reset Capability • Static Flip-Flop Operation - Retains State Indefinitely With Clock Level Either “High” Or “Low” • Medium-Speed Operation - 16 MHz (typ.) Clock Toggle Rate at 10V • Standardized Symmetrical Output Characteristics • 100 Teste

文件：520.73 Kbytes 页数：9 Pages

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