丝印：CD4012BF3A；Package：CDIP；CMOS NAND GATES

Features: Propagation delay time = 60 ns (typ.) at CL =50 pF, Vpp = 10V = Buffered inputs and outputs = Standardized symmetrical output characteristics Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 100% tested for quiescent curre

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德州仪器

CMOS NAND GATES

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德州仪器

CMOS NAND GATES

文件：1.18484 Mbytes 页数：19 Pages

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德州仪器

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages

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德州仪器