CD40101BMS中文资料CMOS 9-Bit Parity Generator/Checker数据手册Renesas规格书

描述 Description

The CD40101BMS is a 9-bit (8 data bits plus 1 parity bit) parity generator/checker. It may be used to detect errors in data transmission or data retrieval. Odd and even outputs facilitate odd or even parity generation and checking.
When used as a parity generator, a parity bit is supplied along with the data to generate an even or odd parity output.
When used as a parity checker, the received data bits and parity bits are compared for correct parity. The even or odd outputs are used to indicate an error in the received data.

特性 Features

• High Voltage Type (20V Rating)
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
   - 1V at VDD = 5V
   - 2V at VDD = 10V
   - 2.5V at VDD = 15V
• Standardized Symmetrical Output Characteristics
• Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”