CD4517BF3A

Marking：CD4517BF3A；Package：CDIP；CMOS Dual 64-Stage Static Shift Register

Features: ®Lowquiescentcurrent—10nA/pkg(typ.) atVpp=5V ®Clockfrequency12MHz(typ.}at Vpp=10V ®Schmitttriggerclockinputsallowoperation withveryslowclockriseandfalltimes =Capableofdrivingtwolow-powerTTLloads, onelow-powerSchottkyTTLload,ortwo HTLloads

CD4517BF3A.A

Marking：CD4517BF3A；Package：CDIP；CMOS Dual 64-Stage Static Shift Register

Features: ®Lowquiescentcurrent—10nA/pkg(typ.) atVpp=5V ®Clockfrequency12MHz(typ.}at Vpp=10V ®Schmitttriggerclockinputsallowoperation withveryslowclockriseandfalltimes =Capableofdrivingtwolow-powerTTLloads, onelow-powerSchottkyTTLload,ortwo HTLloads

CD4527BE

Marking：CD4527BE；Package：PDIP；CMOS BCD Rate Multiplier

Features: *Cascadableinmultiplesof4-bits *Setto“9”inputand,‘8detectoutput *100testforquiescentcurrentat20V *5.V,10-V,and15-Vparametricratings *Standardized,symmetricaloutput characteristics *Maximuminputeurrentof1uAat18Vover fullpackage-temperature

CD4527BNS

Marking：CD4527B；Package：SO；CMOS BCD Rate Multiplier

Features: *Cascadableinmultiplesof4-bits *Setto“9”inputand,‘8detectoutput *100testforquiescentcurrentat20V *5.V,10-V,and15-Vparametricratings *Standardized,symmetricaloutput characteristics *Maximuminputeurrentof1uAat18Vover fullpackage-temperature

CD4527BNSR

Marking：CD4527B；Package：SO；CMOS BCD Rate Multiplier

Features: *Cascadableinmultiplesof4-bits *Setto“9”inputand,‘8detectoutput *100testforquiescentcurrentat20V *5.V,10-V,and15-Vparametricratings *Standardized,symmetricaloutput characteristics *Maximuminputeurrentof1uAat18Vover fullpackage-temperature

CD54AC05F3A

Marking：CD54AC05F3A；Package：CDIP；CDx4AC05 Hex Inverters With Open-Drain Outputs

1Features •ACtypesfeature1.5Vto5.5Voperationand balancednoiseimmunityat30%ofthesupply voltage •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Fanoutto15Fdevices •SCR-latchup-resistantCMOSprocessandcircuit design •Exceeds2kVES

CD54AC138F3A

Marking：CD54AC138F3A；Package：CDIP；CDx4AC138 3-Line to 8-Line Decoders/Demultiplexers

1Features •ACtypesfeature1.5Vto5.5Voperationand balancednoiseimmunityat30ofthesupply voltage •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Designedspecificallyforhigh-speedmemory decodersanddata-transmissionsystems •Incorporatethre

CD54ACT112F3A

Marking：CD54ACT112F3A；Package：CDIP；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays 24-mAOutputDriveCurrent Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,Me

CD54ACT112F3A.A

Marking：CD54ACT112F3A；Package：CDIP；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays 24-mAOutputDriveCurrent Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,Me

CD54ACT138F3A

Marking：CD54ACT138F3A；Package：CDIP；CDx4ACT138 3-Line to 8-Line Decoders/Demultiplexers

1Features •InputsareTTL-voltagecompatible •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Designedspecificallyforhigh-speedmemory decodersanddata-transmissionsystems •Incorporatethreeenableinputstosimplify cascadingand/ordatareception •