12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications

General description CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select input levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bus systems, with speeds up

文件：727.46 Kbytes 页数：21 Pages

恩XP

丝印：2412A；Package：TFBGA48；12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications

General description CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select input levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bus systems, with speeds up

文件：727.46 Kbytes 页数：21 Pages

恩XP

12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications

General description CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select input levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bus systems, with speeds up

文件：727.46 Kbytes 页数：21 Pages

恩XP

12-Bit Bus Switch/Multiplexer for DDR4-DDR3-DDR2 Applications

恩XP

恩智浦

12-BIT SWITCH/MUX FOR DDR4 SAC 4

恩XP

恩智浦