Quad D latch

The BU4042B is a four-circuit D latch with a common clock line and separate data input terminals. When the polarity input is set to “H”, input (D) is presented to output (Q) as is, as long as the clock input is rising, and when the clock input falls, output (Q) holds input (D) at that point. Whil

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ROHM

罗姆

Quad D latch

ROHM

罗姆

QUAD CLOCKED D LATCH

Description The HCC4000B series is composed of close to 80 monolithic types built with Metal Oxide Complementary technology. It provides Designers with high voltage noise tolerant complete Logic series. It radiation hardness and immunity to Heavy Ions make this series to be usable in the

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STMICROELECTRONICS

意法半导体

Quadruple D-latch

DESCRIPTION The HEF4042B is a 4-bit latch with four data inputs (D0 to D3), four buffered latch outputs (O0 to O3), four buffered complementary latch outputs (O0 to O3) and two common enable inputs (E0 and E1). Information on D0 to D3 is transferred to O0 to O3 while both E0 and E1 are in the sam

文件：60.89 Kbytes 页数：6 Pages

PHI

PHI

Quadruple D-latch

DESCRIPTION The HEF4042B is a 4-bit latch with four data inputs (D0 to D3), four buffered latch outputs (O0 to O3), four buffered complementary latch outputs (O0 to O3) and two common enable inputs (E0 and E1). Information on D0 to D3 is transferred to O0 to O3 while both E0 and E1 are in the sam

文件：60.89 Kbytes 页数：6 Pages

PHI

PHI