BS62LV4005TC中文资料Low Power/Voltage CMOS SRAM 512K X 8 bit数据手册Brilliance规格书

描述 Description

■ GENERAL DESCRIPTION
The BS62LV4005 is a high performance, low power CMOS Static Random Access Memory organized as 524,288 words by 8 bits and operates from a wide range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with maximum access time of 55/ 70ns in 5V operation.
Easy memory expansion is provided by active LOW chip enable (CE), active LOW output enable (OE) and three-state output drivers.
The BS62LV4005 has an automatic power down feature, reducing the power consumption significantly when chip is deselected.
The BS62LV4005 is available in the JEDEC standard 32 pin SOP , TSOP, TSOP II and STSOP .■ FEATURES
• Vcc operation voltage : 4.5V ~ 5.5V
• Low power consumption
   Vcc = 5.0V C-grade: 45mA (Max.) operating current
      I -grade: 50mA (Max.) operating current
      1.5uA (Typ.) CMOS standby current
• High speed access time :
   -70 70ns (Max.) at Vcc = 5.0V
   -55 55ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options

特性 Features

• Vcc operation voltage : 4.5V ~ 5.5V
• Low power consumption
   Vcc = 5.0V C-grade: 45mA (Max.) operating current
      I -grade: 50mA (Max.) operating current
      1.5uA (Typ.) CMOS standby current
• High speed access time :
   -70 70ns (Max.) at Vcc = 5.0V
   -55 55ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options