BCM85657数据手册Broadcom中文资料规格书

描述 Description

The Broadcom® BCM85657 is a 16-lane, low-power, low-latency, symmetrical PCIe Gen5, and CXL 2.0 integrated MAC and PHY retimer. This device extends the reach between a root complex (RC) and endpoint (EP) by >40 dB of loss on both the sides at 32 GT/s. Each lane is capable of multiple data rates, including Gen5 (32G), Gen4 (16G), Gen3 (8G), Gen2 (4G), and Gen1 (2.5G). The bifurcation mux and MAC support groups of 1x 16 lanes, 4x 4 lanes, and 8x 2 lanes.For a low-latency application, the user can bypass the mux and MAC. The data path goes directly from SerDes to SerDes.To compensate for link loss, the BCM85657 performs link training (LT) to automatically set the optimal TX-FIR settings.The receiver features integrated and dynamic peaking filter, VGA, DFE, and CDR for signal recovery.The BCM85657 uses a low-cost standard PCIe 100-MHz reference clock.The pinout is compatible with the Intel PCIe 5.0 Retimer Supplemental Footprint, Revision 1.0.

特性 Features

•CompatiblewithPCIeGen5/Gen4/Gen3/Gen2/Gen1andComputeExpressLink(CXL2.0)standards