AZ100ELT21DGR1中文资料Differential PECL to CMOS Translator数据手册Arizona规格书

描述 Description

The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the AZ100ELT21 makes it ideal for applications that require the translation of a clock and a data signal. The AZ100ELT21 is a direct replacement for the ON Semi MC100ELT21.

特性 Features

• 3.5ns propagation delay


• PECL inputs
• CMOS/TTL outputs


• 5V analog supply
• Industrial Temp Range: -40°C to 85°C

应用 Application

• LVPECL to LVCMOS/LVTTL translation
• PECL to CMOS/TTL translation