tinyAVR® 2 Family

The ATtiny1624/1626/1627 microcontrollers of the tinyAVR® 2 family are using the AVR® CPU with hardware multiplier, running at up to 20 MHz, with 16 KB Flash, 2 KB of SRAM, and 256B of EEPROM available in a 14-, 20-, and 24-pin package. The family uses the latest technologies from Microchip with a

文件：3.87381 Mbytes 页数：522 Pages

Microchip

微芯科技

tinyAVR짰 2 Family

文件：4.23561 Mbytes 页数：532 Pages

Microchip

微芯科技

12-bit diff ADC with PGA

The ATtiny427 is a microcontroller featuring the AVR® CPU with hardware multiplier, running at up to 20 MHz and with 4 KB Flash, 512B SRAM and 128B of EEPROM in a 24-pin VQFN 4 x 4 mm package. The family uses the latest Core Independent Peripherals with low-power features, including an Event System, Functional SafetyAppliances safety - IEC 60730 (Class B)\nIndustrial safety – IEC 61508 (SIL)\nAutomotive safety – ISO 26262 (ASIL);

Microchip

微芯科技

Sub-Miniature High Voltage Rectifiers

文件：731.43 Kbytes 页数：2 Pages

EDAL

Si-MMIC-Amplifier in SIEGET 25-Technologie (Cascadable 50 W-gain block Unconditionally stable)

Preliminary data • Cascadable 50 Ω-gain block • Unconditionally stable • Gain |S21|2 = 18,5 dB at 1.8 GHz (appl.1) gain |S21|2 = 22 dB at 1.8 GHz (appl.2) IP3out = +7 dBm at 1.8 GHz (VD=3V, ID=9.4mA) • Noise figure NF = 2.2 dB at 1.8 GHz • typical device voltage VD = 2 V to 5 V • Reverse iso

文件：35.35 Kbytes 页数：5 Pages

SIEMENS

西门子

Si-MMIC-Amplifier in SIEGET 25-Technologie

Si-MMIC-Amplifier in SIEGET® 25-Technologie • Cascadable 50 Ω-gain block • Unconditionally stable • Gain |S21|2 = 18.5 dB at 1.8 GHz (Appl.1) gain |S21|2 = 22 dB at 1.8 GHz (Appl.2) IP3out = +7 dBm at 1.8 GHz (VD=3V, ID=9.4mA) • Noise figure NF = 2.2 dB at 1.8 GHz • Typical device voltage VD

文件：58.53 Kbytes 页数：5 Pages

Infineon

英飞凌