ADSP-21561中文资料Up to 933 MHz SHARC+ DSP with 1536 KB Shared L2 SRAM数据手册ADI规格书

描述 Description

Reaching speeds of up to 933 MHz, the ADSP-21560/ADSP-21561/ADSP-21564 processors are members of the SHARC® family of products. These processors offer a cost-reduced pin- and code-compatible option to the ADSP-21562/ADSP-21563/ADSP-21565 processors, while offering increased L2 memory (up to 2MB).
The processors are members of the SIMD SHARC family of digital signal processors (DSPs) that feature Analog Devices, Inc., Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). Additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.
By integrating a rich set of industry-leading system peripherals and memory, the SHARC+ processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.
APPLICATIONS

Automotive:
audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS

Consumer & Professional Audio:
speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones

特性 Features

SHARC+ Core Infrastructure800 MHz (max) or 933 MHz (max) Core clock frequency
640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance
32-bit, 40-bit & 64-bit floating point support
32-bit fixed point
Byte, short-word, word, long-word addressed
Memory1536 KB on-chip Level 2 (L2) SRAM with parity - eliminates need for external memory in many use cases
xSPI to support external HyperRAM™/HyperFlash™ memory
Advanced Hardware AcceleratorsEnhanced FIR/IIR offload engines running at Core clock frequency for added processing power
Security Crypto Engines with OTP
Powerful DMA SystemInnovative Digital Audio Interface (DAI) includes:8x Full SPORT interfaces w/TDM & I2S modes
2x S/PDIF Rx/Tx, 8 ASRC pairs
8x Precision Clock Generators
24 Buffers
Other Peripheral Connectivity / Interfaces:1x SPI, 2x Quad SPI, 1x xSPI
MLB 3-pin
4x I2C,2x UARTs
6x General Purpose Timer, 1x General Purpose Counter
2x Watchdog Timers
22 GPIO pins, 24 DAI pins
Package14mm x 14mm 120-lead LQFP
Additional FeaturesSecurity and ProtectionCrypto hardware accelerators
Fast secure boot with IP protection

Enhanced FIR and IIR accelerators running up to 933 MHz
AEC-Q100 qualified for automotive applications