ADS52J6x, 8/4-Channel, 16/14-Bit, 125MSPS, 70mW/Ch for 8-CH ADC With JESD204B Interface

1 Features • 16/14-Bit Resolution, 8/4-Channel ADC • Idle Signal-to-Noise Ratio (SNR): – 80dBFS for 16bit ADC – 79dBFS for 14bit ADC • Power dissipation at 125MSPS, 4CH per Lane: – 70mW/Ch for ADS52J65/66 (8CH ADC) – 82mW/Ch for ADS52J67/68 (4CH ADC) • Power dissipation at 62.5MSPS, 8CH pe

文件：1.1534 Mbytes 页数：13 Pages

TI

德州仪器

ADS52J6x, 8/4-Channel, 16/14-Bit, 125MSPS, 70mW/Ch for 8-CH ADC With JESD204B Interface

1 Features • 16/14-Bit Resolution, 8/4-Channel ADC • Idle Signal-to-Noise Ratio (SNR): – 80dBFS for 16bit ADC – 79dBFS for 14bit ADC • Power dissipation at 125MSPS, 4CH per Lane: – 70mW/Ch for ADS52J65/66 (8CH ADC) – 82mW/Ch for ADS52J67/68 (4CH ADC) • Power dissipation at 62.5MSPS, 8CH pe

文件：1.1534 Mbytes 页数：13 Pages

TI

德州仪器

ADS52J6x, 8/4-Channel, 16/14-Bit, 125MSPS, 70mW/Ch for 8-CH ADC With JESD204B Interface

1 Features • 16/14-Bit Resolution, 8/4-Channel ADC • Idle Signal-to-Noise Ratio (SNR): – 80dBFS for 16bit ADC – 79dBFS for 14bit ADC • Power dissipation at 125MSPS, 4CH per Lane: – 70mW/Ch for ADS52J65/66 (8CH ADC) – 82mW/Ch for ADS52J67/68 (4CH ADC) • Power dissipation at 62.5MSPS, 8CH pe

文件：1.1534 Mbytes 页数：13 Pages

TI

德州仪器

ADS52J91 10-Bit, 12-Bit, 14-Bit, Multichannel, Low-Power, High-Speed ADC With LVDS, JESD Outputs

1 Features • 16-Channel ADC configurable to convert 8, 16, or 32 inputs • Maximum ADC Conversion Rate: – 125 MSPS in 10-bit mode – 100 MSPS in 12-bit mode – 65 MSPS in 14-bit mode • Supplies: 1.2 V, 1.8 V • Differential or single-ended input Clock • Signal-to-noise ratio (SNR): – 61 dBFS

文件：453.19 Kbytes 页数：6 Pages

TI

德州仪器

丝印：ADS52J91；Package：NFBGA；ADS52J91 10-Bit, 12-Bit, 14-Bit, Multichannel, Low-Power, High-Speed ADC With LVDS, JESD Outputs

1 Features • 16-Channel ADC configurable to convert 8, 16, or 32 inputs • Maximum ADC Conversion Rate: – 125 MSPS in 10-bit mode – 100 MSPS in 12-bit mode – 65 MSPS in 14-bit mode • Supplies: 1.2 V, 1.8 V • Differential or single-ended input Clock • Signal-to-noise ratio (SNR): – 61 dBFS

文件：453.19 Kbytes 页数：6 Pages

TI

德州仪器

丝印：ADS52J91；Package：NFBGA；ADS52J91 10-Bit, 12-Bit, 14-Bit, Multichannel, Low-Power, High-Speed ADC With LVDS, JESD Outputs

1 Features • 16-Channel ADC configurable to convert 8, 16, or 32 inputs • Maximum ADC Conversion Rate: – 125 MSPS in 10-bit mode – 100 MSPS in 12-bit mode – 65 MSPS in 14-bit mode • Supplies: 1.2 V, 1.8 V • Differential or single-ended input Clock • Signal-to-noise ratio (SNR): – 61 dBFS

文件：453.19 Kbytes 页数：6 Pages

TI

德州仪器

ADS5400 12-Bit, 1-GSPS Analog-to-Digital Converter

1 Features 1• 1-GSPS Sample Rate • 12-Bit Resolution • 2.1 GHz Input Bandwidth • SFDR = 66 dBc at 1.2 GHz • SNR = 57.6 dBFS at 1.2 GHz • 7 Clock Cycle Latency • Interleave Friendly: Internal Adjustments for Gain, Phase, and Offset • 1.5-V to 2-V Selectable Full-Scale Range • LVDS-Compati

文件：2.42921 Mbytes 页数：58 Pages

TI

德州仪器

丝印：ADS5400I；Package：HTQFP(PZP)；ADS5400 12-Bit, 1-GSPS Analog-to-Digital Converter

1 Features 1• 1-GSPS Sample Rate • 12-Bit Resolution • 2.1 GHz Input Bandwidth • SFDR = 66 dBc at 1.2 GHz • SNR = 57.6 dBFS at 1.2 GHz • 7 Clock Cycle Latency • Interleave Friendly: Internal Adjustments for Gain, Phase, and Offset • 1.5-V to 2-V Selectable Full-Scale Range • LVDS-Compati

文件：2.42921 Mbytes 页数：58 Pages

TI

德州仪器

丝印：ADS5400I；Package：HTQFP(PZP)；ADS5400 12-Bit, 1-GSPS Analog-to-Digital Converter

1 Features 1• 1-GSPS Sample Rate • 12-Bit Resolution • 2.1 GHz Input Bandwidth • SFDR = 66 dBc at 1.2 GHz • SNR = 57.6 dBFS at 1.2 GHz • 7 Clock Cycle Latency • Interleave Friendly: Internal Adjustments for Gain, Phase, and Offset • 1.5-V to 2-V Selectable Full-Scale Range • LVDS-Compati

文件：2.42921 Mbytes 页数：58 Pages

TI

德州仪器

丝印：ADS5400I；Package：HTQFP(PZP)；ADS5400 12-Bit, 1-GSPS Analog-to-Digital Converter

1 Features 1• 1-GSPS Sample Rate • 12-Bit Resolution • 2.1 GHz Input Bandwidth • SFDR = 66 dBc at 1.2 GHz • SNR = 57.6 dBFS at 1.2 GHz • 7 Clock Cycle Latency • Interleave Friendly: Internal Adjustments for Gain, Phase, and Offset • 1.5-V to 2-V Selectable Full-Scale Range • LVDS-Compati

文件：2.42921 Mbytes 页数：58 Pages

TI

德州仪器