OC-48/OC-48 FEC Clock and Data Recovery

FEATURES Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single reference clock frequency for both nati

文件：340.22 Kbytes 页数：20 Pages

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OC-48/OC-48 FEC Clock and Data Recovery

FEATURES Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single reference clock frequency for both nati

文件：340.22 Kbytes 页数：20 Pages

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亚德诺

Package：48-WFQFN 裸露焊盘，CSP；包装：卷带（TR） 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLK DATA REC SDH 2.66GHZ

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Package：48-WFQFN 裸露焊盘，CSP；包装：托盘 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLK DATA REC SDH 2.66GHZ

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