Single 11-bit ADC; 125 Msps with input buffer; CMOS or LVDS DDR digital outputs

 SNR, 66.5 dBFS; SFDR, 86 dBc  Sample rate up to 125 Msps  11-bit pipelined ADC core  Clock input divided by 2 for less jitter contribution  Integrated input buffer  Flexible input voltage range: 1 V (p-p) to 2 V (p-p)  CMOS or LVDS DDR digital outputs  Pin compatible with the ADC

文件：376.89 Kbytes 页数：36 Pages

RENESAS

瑞萨

Single 11-bit ADC; 125 Msps with input buffer; CMOS or LVDS DDR digital outputs

文件：373.3 Kbytes 页数：36 Pages

IDT

NA

Texas Instruments

上传：上海皇华信息科技有限公司

NA

Texas Instruments

上传：上海皇华信息科技有限公司

SOT

TI/NS

上传：深圳市盛泰捷科电子有限公司