丝印：ADC；Package：TSOP-6；Low Power Offline Constant Current & Constant Voltage Primary Side PWM Current-Mode Controller with/without High Voltage Startup Current Source

The NCP1360/65 offers a new solution targeting output power levels from a few watts up to 20 W in a universal−mains flyback application. Thanks to a novel method this new controller saves the secondary feedback circuitry (opto−coupler and TL431 reference) while achieving excellent line and loa

文件：1.03379 Mbytes 页数：31 Pages

ONSEMI

安森美半导体

Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

丝印：ADC07D1520CIYB；Package：HLQFP；Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

丝印：ADC07D1520CIYB；Package：HLQFP；Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

丝印：ADC07D1520CIYB；Package：HLQFP；Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

丝印：ADC07D1520CIYB；Package：HLQFP；Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

General Description The ADC07D1520 is a dual, low power, high performance CMOS analog-to-digital converter. The ADC07D1520 digitizes signals to 7 bits of resolution at sample rates up to 1.5 GSPS. Its features include a test pattern output for system debug, a clock phase adjust, and selectabl

文件：802.32 Kbytes 页数：53 Pages

TI

德州仪器

CMOS 8-bit A/D converters

DESCRIPTION The ADC0803 family is a series of three CMOS 8-bit successive approximation A/D converters using a resistive ladder and capacitive array together with an auto-zero comparator. These converters are designed to operate with microprocessor-controlled buses using a minimum of external cir

文件：187.82 Kbytes 页数：18 Pages

PHI

PHI

CMOS 8-bit A/D converters

DESCRIPTION The ADC0803 family is a series of three CMOS 8-bit successive approximation A/D converters using a resistive ladder and capacitive array together with an auto-zero comparator. These converters are designed to operate with microprocessor-controlled buses using a minimum of external cir

文件：187.82 Kbytes 页数：18 Pages

PHI

PHI