655 MHz Low Jitter Clock Generator

PRODUCT OVERVIEW The AD9540 is Analog Devices’ first dedicated clocking product specifically designed to support the extremely stringent clocking requirements of the highest performance data converters. The device features high performance PLL (phase-locked loop) circuitry, including a flexible 2

文件：485.42 Kbytes 页数：32 Pages

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655 MHz Low Jitter Clock Generator

文件：588.82 Kbytes 页数：32 Pages

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低抖动、基于DDS的时钟发生器和频率合成器

AD9540支持多种功能，包括信号合成和低抖动时钟发生，适合各种应用。该器件内置高性能PLL电路，包括灵活的200 MHz鉴频鉴相器和数字控制电荷泵电流。它还可以使低抖动、655 MHz CML模式（PECL兼容）输出驱动器具有可编程压摆率。器件支持最高2.7 GHz的外部VCO速率。片上400 MSPS DDS提供及精密的调谐分辨率和相位编程能力。信息通过一个串行I/O端口载入AD9540中，该端口的器件写入速度为25Mb/s。还可以对AD9540分频器模块进行编程，支持扩频时钟模式。\n\n AD9540的额定工作温度范围为-40℃至+85℃扩展汽车应用温度范围。 • 出色的内在抖动性能\n\n• 200 MHz鉴频鉴相器输入\n\n• 655 MHz可编程输入分频器用于鉴频鉴相器(÷M,N) {M,N =1..16}（可旁路）\n\n• 可编程RF分频器(÷R) {R = 1、2、4、8}（可旁路）\n\n• 8个可编程相位/频率配置文件\n\n• 400 MSPS内部DDS时钟速度\n\n• 48位频率调谐字分辨率;

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655 MHz Low Jitter Clock Generator

PRODUCT OVERVIEW The AD9540 is Analog Devices’ first dedicated clocking product specifically designed to support the extremely stringent clocking requirements of the highest performance data converters. The device features high performance PLL (phase-locked loop) circuitry, including a flexible 2

文件：485.42 Kbytes 页数：32 Pages

AD

亚德诺

655 MHz Low Jitter Clock Generator

PRODUCT OVERVIEW The AD9540 is Analog Devices’ first dedicated clocking product specifically designed to support the extremely stringent clocking requirements of the highest performance data converters. The device features high performance PLL (phase-locked loop) circuitry, including a flexible 2

文件：485.42 Kbytes 页数：32 Pages

AD

亚德诺

655 MHz Low Jitter Clock Generator

PRODUCT OVERVIEW The AD9540 is Analog Devices’ first dedicated clocking product specifically designed to support the extremely stringent clocking requirements of the highest performance data converters. The device features high performance PLL (phase-locked loop) circuitry, including a flexible 2

文件：485.42 Kbytes 页数：32 Pages

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亚德诺

655 MHz Low Jitter Clock Generator

文件：846.91 Kbytes 页数：32 Pages

AD

亚德诺

655 MHz Low Jitter Clock Generator

文件：588.82 Kbytes 页数：32 Pages

AD

亚德诺

655 MHz Low Jitter Clock Generator

文件：588.82 Kbytes 页数：32 Pages

AD

亚德诺

655 MHz Low Jitter Clock Generator

文件：588.82 Kbytes 页数：32 Pages

AD

亚德诺