20-Bit, 20 MSPS, Differential SAR ADC

FEATURES ► High performance ► Throughput: 20MSPS, 77.50ns conversion latency ► INL: ±4ppm (typical), ±8ppm (maximum) ► Dynamic range: 94.6dBFS ► SNR/THD ► 94dB (typical)/−117.3dB (typical) at fIN = 1kHz ► 93.7dB (typical)/−103.7dB (typical) at fIN = 1MHz ► Noise spectral density: −164.6dBF

文件：3.43052 Mbytes 页数：95 Pages

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亚德诺

20-Bit, 20 MSPS, Differential SAR ADC

FEATURES ► High performance ► Throughput: 20MSPS, 77.50ns conversion latency ► INL: ±4ppm (typical), ±8ppm (maximum) ► Dynamic range: 94.6dBFS ► SNR/THD ► 94dB (typical)/−117.3dB (typical) at fIN = 1kHz ► 93.7dB (typical)/−103.7dB (typical) at fIN = 1MHz ► Noise spectral density: −164.6dBF

文件：3.43052 Mbytes 页数：95 Pages

AD

亚德诺

20-Bit, 20 MSPS, Differential SAR ADC

FEATURES ► High performance ► Throughput: 20MSPS, 77.50ns conversion latency ► INL: ±4ppm (typical), ±8ppm (maximum) ► Dynamic range: 94.6dBFS ► SNR/THD ► 94dB (typical)/−117.3dB (typical) at fIN = 1kHz ► 93.7dB (typical)/−103.7dB (typical) at fIN = 1MHz ► Noise spectral density: −164.6dBF

文件：3.43052 Mbytes 页数：95 Pages

AD

亚德诺

Quad 2-input AND gate

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

文件：50.07 Kbytes 页数：4 Pages

ROHM

罗姆

High Voltage CMOS Logic ICs >Gate>

文件：505.65 Kbytes 页数：22 Pages

ROHM

罗姆

High Voltage CMOS Logic ICs >Gate>

文件：516.74 Kbytes 页数：22 Pages

ROHM

罗姆