24-Bit, 2 MSPS, SAR ADC

GENERAL DESCRIPTION The AD4030-24 is a 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24 achieves unparalleled precision from −40°C to

文件：2.61014 Mbytes 页数：48 Pages

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亚德诺

24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

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24 位、2 MSPS、SAR ADC

AD4030-24/AD4032-24分别是2 MSPS或500 kSPS逐次逼近寄存器(SAR)模数转换器(ADC)，具有Easy Drive™特性。AD4030-24/AD4032-24具有保证最大±0.9 ppm的积分非线性(INL)和24位无失码，在−40°C至+125°C时可实现出色的精度。图1显示了AD4030-24/AD4032-24的功能架构。\n\n 低漂移、内部精密基准电压源缓冲器简化了与其他系统电路的基准电压共用。使用5V基准电压源时，AD4030-24/AD4032-24提供109 dB的典型动态范围。低噪底支持需要较小增益和较低功耗的信号链。具有可编程抽取率 • 高性能\n• 吞吐量：2 MSPS (AD4030-24) 或 500 kSPS (AD4032-24) 选项\n\n• 积分非线性：从 −40°C to +125°C，最大值为 ±0.9 ppm\n\n• SNR：108.4 dB（典型值）\n\n• 总谐波失真：−127 dB（典型值）\n\n• NSD−169 dBFS/Hz （典型值）\n\n\n\n\n• 低功耗\n• 2 MSPS 时为 30 mW\n\n• 500 kSPS时为 10 mW\n\n• 10 kSPS 时为 3 mW\n\n\n\n\n• 易驱动™功能降低系统复杂性\n• 低 1.2μ直流输入的输入电流\n\n•;

ADI

亚德诺

24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

AD

亚德诺

24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

AD

亚德诺

24-Bit, 2 MSPS, SAR ADC

GENERAL DESCRIPTION The AD4030-24 is a 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24 achieves unparalleled precision from −40°C to

文件：2.61014 Mbytes 页数：48 Pages

AD

亚德诺

24-Bit, 2 MSPS, SAR ADC

GENERAL DESCRIPTION The AD4030-24 is a 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24 achieves unparalleled precision from −40°C to

文件：2.61014 Mbytes 页数：48 Pages

AD

亚德诺

24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

AD

亚德诺