ACH16841DGG中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates.

FEATURES

• Wide supply voltage range of 1.2V to 3.6V

• Complies with JEDEC standard no. 8-1A

• Wide supply voltage range of 1.2V to 3.6V

• CMOS low power consumption

• Direct interface with TTL levels

• MULTIBYTETM flow-through standard pin-out architecture

• Low inductance multiple VCC and GND pins for minimum noise and ground bounce

• Current drive ±24 mA at 3.0 V

• All inputs have bus hold circuitry

• Output drive capability 50Ω transmission lines @ 85°C

• 3-State non-inverting outputs for bus oriented applications