ACH16646DGG中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The 74ALVCH16646 consists of 16 non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers.

FEATURES

• Complies with JEDEC standard no. 8-1A

• CMOS low power consumption

• MULTIBYTETM flow-through pin-out architecture

• Low inductance, multiple VCC and ground pins for minimum noise

and ground bounce

• Direct interface with TTL levels

• Current drive ± 24 mA at 3.0 V

• Output drive capability 50Ω transmission lines @ 85°C

• All inputs have bushold circuitry