SN74ABT16373ADLR.B

Marking：ABT16373A；Package：SSOP；16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

MembersoftheTexasInstruments WidebusEFamily State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Latch-UpPerformanceExceeds500mAPer JEDECStandardJESD-17 TypicalVOLP(OutputGroundBounce)

SN74ABT16373ADLRG4

Marking：ABT16373A；Package：SSOP；16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

MembersoftheTexasInstruments WidebusEFamily State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Latch-UpPerformanceExceeds500mAPer JEDECStandardJESD-17 TypicalVOLP(OutputGroundBounce)

SN74ABT18245ADGGR

Marking：ABT18245A；Package：TSSOP；SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS

MembersoftheTexasInstruments SCOPEEFamilyofTestabilityProducts MembersoftheTexasInstruments WidebusEFamily CompatibleWiththeIEEEStandard 1149.1-1990(JTAG)TestAccessPortand Boundary-ScanArchitecture SCOPEEInstructionSet –IEEEStandard1149.1-1990Required Instru

SN74ABT18245ADL

Marking：ABT18245A；Package：SSOP；SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS

MembersoftheTexasInstruments SCOPEEFamilyofTestabilityProducts MembersoftheTexasInstruments WidebusEFamily CompatibleWiththeIEEEStandard 1149.1-1990(JTAG)TestAccessPortand Boundary-ScanArchitecture SCOPEEInstructionSet –IEEEStandard1149.1-1990Required Instru

SN74ABT18245ADLR

Marking：ABT18245A；Package：SSOP；SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS

MembersoftheTexasInstruments SCOPEEFamilyofTestabilityProducts MembersoftheTexasInstruments WidebusEFamily CompatibleWiththeIEEEStandard 1149.1-1990(JTAG)TestAccessPortand Boundary-ScanArchitecture SCOPEEInstructionSet –IEEEStandard1149.1-1990Required Instru

SN74ABT2827DW

Marking：ABT2827；Package：SOIC；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

OutputPortsHaveEquivalent25-WSeries Resistors,SoNoExternalResistorsAre Required State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Flow-ThroughArchitectureOptimizes PCBLayout Latch-UpPerformanceExceeds500mA PerJEDECStandardJESD-17 Typical

SN74ABT2827DW.B

Marking：ABT2827；Package：SOIC；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

OutputPortsHaveEquivalent25-WSeries Resistors,SoNoExternalResistorsAre Required State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Flow-ThroughArchitectureOptimizes PCBLayout Latch-UpPerformanceExceeds500mA PerJEDECStandardJESD-17 Typical

SN74ABT2827DWR

Marking：ABT2827；Package：SOIC；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

OutputPortsHaveEquivalent25-WSeries Resistors,SoNoExternalResistorsAre Required State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Flow-ThroughArchitectureOptimizes PCBLayout Latch-UpPerformanceExceeds500mA PerJEDECStandardJESD-17 Typical

SN74ABT2827DWR.B

Marking：ABT2827；Package：SOIC；10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

OutputPortsHaveEquivalent25-WSeries Resistors,SoNoExternalResistorsAre Required State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Flow-ThroughArchitectureOptimizes PCBLayout Latch-UpPerformanceExceeds500mA PerJEDECStandardJESD-17 Typical

SN74ABT2952ADWR

Marking：ABT2952A；Package：SOIC；OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Two8-BitBack-to-BackRegistersStore DataFlowinginBothDirections NoninvertingOutputs TypicalVOLP(OutputGroundBounce)