Features

• LP-HCSL outputs with Zo = 85; save power and board

space - no termination resistors required.

• Space-saving 48-pin VFQFPN package

• Fixed feedback path for 0ps input-to-output delay

• 8 OE# pins; hardware control of each output

• PLL or bypass mode; PLL can dejitter incoming clock

• 100MHz or 133MHz PLL mode operation; supports PCIe

and QPI applications

• Selectable PLL bandwidth; minimizes jitter peaking in

downstream PLLs

• Spread spectrum compatible; tracks spreading input

clock for low EMI

• 25MHz PFT clock delay management

Key Specifications

• Cycle-to-cycle jitter < 50ps

• Output-to-output skew < 65ps

• Input-to-output delay variation < 50ps

• PCIe Gen3 phase jitter < 1.0ps RMS

• QPI/UPI 9.6GT/s 12UI phase jitter

9ZXL0851属于集成电路（IC） > 时钟缓冲器，驱动器。瑞萨科技有限公司制造生产的9ZXL0851时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。