9FGU0641数据手册集成电路（IC）的应用特定时钟/定时规格书PDF

描述 Description

The 9FGU0641 is a member of IDT's 1.5 V Ultra-Low-Power PCIe clock family with integrated output terminations providing Zo=100 Ω. The device has 6 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

For information regarding evaluation boards and material, please contact your local IDT sales representative.

特性 Features

• Direct connection to 100 ohm transmission lines; saves 24 resistors compared to standard PCIe devices
• 45 mW typical power consumption; reduced thermal concerns
• Outputs can optionally be supplied from any voltage between 1.05 and 1.5 V; maximum power savings
• OE# pins; support DIF power management
• Programmable Slew rate for each output; allows tuning for various line lengths
• Programmable output amplitude; allows tuning for various application environments
• DIF outputs blocked until PLL is locked; clean system start-up
• Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
• External 25 MHz crystal; supports tight ppm with 0 ppm synthesis error
• Configuration can be accomplished with strapping pins; SMBus interface not required for device control
• 3.3 V tolerant SMBus interface works with legacy controllers
• Space saving 6x6 mm 48-pin VFQFPN; minimal board space
• Selectable SMBus addresses; multiple devices can easily share an SMBus segment